The Execution Cycle Simulation

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When you start the simulation you will see the CPU with the program counter and the instruction register on the left of the screen, ROM on the right and the address bus (blue), data bus (green) and the control bus (red) in between.

Refreshing the page, which simulates power-down followed by power-up, does not change the contents of ROM because ROM is nonvolatile.

However, the data on the busses at this point is random.

Step through the simulation by clicking on Next ->.

  1. The contents of the program counter are placed on the address bus.
  2. Control signals ROM: address on bus is valid ->.
  3. ROM selects location.
  4. ROM places data in location onto the data bus and <- Control signals CPU: data on bus is valid.
  5. Data on bus is placed in the instruction register.
  6. Cycle repeats at step 1 above.

This simulation deals with one-byte instructions only.

 

 
Copyright (c) 2005-2013 James Rogers